ABOUT
Currently serving as a Reader (Associate Professor) in the School of Informatics at the University of Edinburgh, I am also an Associate Professor of Computer Science at Georgia Tech (on leave). My research specializes in computer architecture, specifically focusing on datacenter architectures, rack-scale computing, network-compute integration, hardware-software co-design, and memory systems.
My work is driven by a particular interest in communication-intensive, latency-sensitive workloads with stringent service-level objectives. As a firm advocate for blurring the boundaries between network and compute, I promote a design philosophy that pushes functionality with richer semantics to network endpoints—paving the way for high-performance, efficient, and scalable microsecond-scale services. Broadly, my research explores the ongoing transition from CPU-centric to network- and memory-centric computing, investigating the impact of this paradigm shift evolves system architectures, algorithms, and software.
I am a recipient of the NSF CAREER award, a Google Faculty Research award, and several teaching distinctions at Georgia Tech. My research has been supported by the NSF, IARPA, Intel, and Samsung. I earned my PhD from EPFL in 2018.
